The era of microchips is coming to an end, prepare to welcome the era of super chips

While chipmakers like TSMC or Samsung are racing to make chip processes smaller and smaller, the whole chip industry is embracing a new strategy to power these processors: they are getting bigger. Just as urban areas expand, now many of the chips inside our most powerful devices are taking up so much space that they can no longer be called "microchips".

To expand processing capabilities, semiconductor engineers are finding ways to stack these chips on top of each other. That is, instead of just stacking transistors on top of each other to form towering apartment buildings, even the flat silicon wafers inside a computer - such as memory chips, power management chips and even graphics chips - are also stacked. into different layers.

The reason behind this chip design trend is simple: the need to make chips faster and more feature-rich has not stopped and the chip industry's ability to meet requirements by miniaturization. moreover transistors have encountered many technical hurdles.

Semiconductor engineers are looking for ways to stack these chips on top of each other.

As a result, semiconductor engineers are increasing their performance by placing these chips even closer together. Like avenues connecting cities, the shorter this distance is, the faster data moves between them, and thus the processing power improves. As a result, in many cases, these meticulously carved silicon metropolises have grown to a level rarely seen in chips.

Currently most chips are usually about the size of a small coin, but some new chips are already the size of a playing card, and even have chips the size of a plate.

Not only appear in the world's most powerful supercomputers, these chips also appear in household electronics. Microsoft's new Xbox console and Sony's PS5 are both using AMD-designed processors. Apple also exploited this design for the M1 Ultra processor in their Mac Studio computers. This approach is also used by Intel for the Ponte Vecchio processors used in the company's supercomputers and data servers.

This does not mean they are violating Moore's law. The chip may not be cheaper according to the Intel co-founder, but its performance and features are getting better and better. Even ASML, which makes the world's most advanced chip-making machines, believes that, to keep the pace of Moore's Law alive, miniaturizing transistors in chips is not enough.

Apple's M1 Ultra chip, basically 2 M1 Max chips put together to increase performance.

Stack cities on top of each other and connect by elevator

Just as compared to urban areas, if a city cannot further shrink the size of houses or make transportation more efficient, the city has no choice but to expand. outside. One obvious example is Singapore, whose land area has expanded by 25% over the past 50 years.

Making super-large chips is just as difficult as shrinking it. Imagine having to arrange each component of a chip with nanometer precision and wire them together without any micro-solders.

This is made possible by recent improvements in a process that is important only after chip lithography: chip encapsulation. People often do not pay attention to this stage, but it is an indispensable stage in chip production. At this stage, the manufacturer will find a way to connect the micro-conductors in the chips together and cover it with plastic before placing it on the circuit board to connect to the rest of the device.

N3XT system, the idea of ​​​​packing memory chips and processing chips in 3D was presented by TSMC in 2019

In traditional devices, a chip that sends and receives radio waves (for example, a Wifi chip) can connect to another chip to do the same computation, and that connection is called a "bus". Like the bus on the boulevard that connects cities, these "buses" can hardly deliver anything fast.

However, with the new chip packaging method, these independent chips are directly connected to each other to become super chips. Instead of connecting to each other via "buses", these chips are stacked to stay in the same high-rise building.

According to Subramanian Iyer, a former director of IBM's Packaging Division, a typical microchip spends almost a third of its area - as well as energy consumption - on the circuits that transmit the chip's computation results to the rest. back of the device. That certainly doesn't work for its power.

Chips stacked on top of each other make communication between them faster by allowing for more connections between them – just like moving an elevator between floors in a skyscraper would be fast. than walking across the street to get to the nearest neighbor.

Micron's 232 layer memory chip.

In fact, for memory chips, this has long been the norm. Micron Technology has introduced a memory chip with 232 layers. Now, however, this design is just beginning to make its way to other types of microchips.

The foundation for creating these superchips and chips on top of each other is a new type of microchip called a "chiplet". It eliminates the old-fashioned communication circuits for a more direct connection to other chiplets. By creating short, direct connections – often made from the very silicon that make up the chips instead of other metal wires – these chiplets can be fused together to form superchips and acts like a giant processor.

A good example is the recently introduced Ponte Vecchio graphics processor by Intel. It is made up of 63 different chiplets. These chiplets are stacked and right next to each other, covering a total area of ​​3,100mm2, including 100 billion transistors. Meanwhile, a typical laptop CPU has an area of ​​​​about 150mm2, equal to 1/20 of this chip, and only about 1.5 billion transistors, equal to 1.5% of Ponte Vecchio.

This stacked chiplet design is clearly the future for Intel – most of the company's announced but unreleased processors are manufactured with the technology, as it "provides an approach A new approach to chip manufacturing is faster and more cost-effective than traditional methods," said Debendra Das Sharma, senior member of Intel.

The stacked chiplets also help Intel increase the performance of desktop and server processors without increasing footprint or power consumption. Indeed, stacked chiplets allow engineers to increase the number of transistors compared to current designs by optimizing the time and energy for the components in the chip to communicate with each other.

3D Foveros chip stacking technology is brought by Intel in the Intel Lakefield chip generation

A pioneer in chiplet technology, AMD has also launched processors with a small chiplet inside. The company realized that, by stacking memory chips on top of its CPUs, it could dramatically increase the computational speed in its processors.

Everyone is on the same boat

According to Marc Swinnen, marketing director at Ansys, while chiplet-based superchips are only a handful and appear in large computing systems, the trend to create them is accelerating throughout the chip industry. Ansys is a company that builds software that simulates physics, which is widely used in the chip design industry.

The company said that the number of projects deployed by Ansys customers that involved chiplets on top of each other increased 20-fold compared to 2019.

In March, a chip industry joint venture called Universal Chiplet Interconnect Express, or UCIe, announced it was working with both Intel and AMD to develop a new standard. This standard will make it possible for anyone involved to create chiplets that can be linked to products from other manufacturers. In addition to Intel, AMD, this joint venture also includes ARM, TSMC, Samsung and other chip design and manufacturing firms.

Standard open source chiplet design version 1.0 of UCIe

This standard was created with the hope that, in the future, any company can buy chiplets from another company and assemble them however they want or according to their intended use. Imagine, you could take the best parts of New York, Rio and Tokyo, and then stitch them together into the city of your dreams according to your taste.

But it is precisely this that makes Dr. Kumar of the University of Illinois distrustful of the standard's success: "Standardizing anything in this industry is too much of a challenge, because there will be compromises. And not everyone is motivated to play nice with others."

The main driver for this technology is the growing desire of large companies – including Amazon, Google, Tesla, Microsoft and others – to create their own processors with increasing power to operate. everything: cloud services, smartphones, game consoles and self-driving cars.

In addition, according to the doctor, the interest in superchips also comes from the exponentially increasing demand for placing machine learning and artificial intelligence systems right on top of the hardware. While some companies meet this need by building giant microchips the old-fashioned way – like Cerebras' AI chip that is the size of an entire wafer. Chiplets can now open up new ways to build more powerful yet compact AI processors.

From supercomputers to wearables

Not only limited to applications in systems that prioritize high performance, enthusiasm for superchips will one day make its way into devices that prioritize battery life.

AMD's chiplet platform is ready to connect with third-party chiplets.

According to Dr. Kumar, just as cities connect to suburbs by rapid transit systems, future chiplets could connect to each other over longer distances and by newer means.

This seems absurd when the longer distance will increase the communication and data processing time. However, it does have the benefit of making it possible for smaller chips to be connected to more flexible microchips, to create more flexible computers. It can even create entirely new types of computing devices.

Tests by Dr. Kumar's team have shown that chiplets can be connected to each other by flexible circuits in wearables, or systems can be wound around surfaces like the wings of an airplane. Even Dr Iyer says his team is developing the semiconductor blocks needed for flexible phones.

Although the challenges of superchips persist, efforts to transform today's breakthroughs in microchips into smaller chiplets that can be assembled together are still underway. Moore's Law would not be able to continue without it.