Samsung developed stacked chip package technology
Samsung Electronics has successfully developed a chip package in which the microprocessors are stacked vertically and connected directly to each other through wires. Expected to ship in 2007, this chip package marks a big change compared to c & a
Samsung Electronics has successfully developed a chip package in which the microprocessors are stacked vertically and connected directly to each other through wires.
Source: CNET
Expected to ship in 2007, this chip package marks a big change compared to the chip packages that Samsung, Intel and many companies are producing.
Memory chips are stacked on top of each other instead of layout horizontally as they are now, so that the space of the motherboard will be maximized. As a result, mobile phone companies, MP3 players, and handheld devices may shrink their product size even further.
In current multichip packages, different chips exist as separate, independent "bases", with sand fencing surrounding the chip package. They communicate with each other and with the rest of the parts through wires connecting to tiny metal ball bearings spread out outside the fence.
Meanwhile, in the new chip package (temporarily called the chip stack processed at the silicon chip level - WSP-wafer-level processed stack package), a technology called TSV (Throu Silicon Vias) is used. With TSV, a wire can run directly from the silicon circuit inside the chip to another chip. Therefore, there is no need for more space for fences, wires and ball bearings inside the chip package.
A Samsung chip package can contain 8 stacked chips. The model includes 8 2GB dynamic memory chips, resulting in a total capacity of up to 16GB inside one dimension, which is only 0.56mm tall. In the first stage, the WSP chip package will only apply to the dynamic memory card.
At a later stage, each WSP will be able to combine many different chips. For example, a chip package will contain both DRAM and flash.
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